1. Field of the Invention
The present inventive concept relates to a data storage device, and more particularly, to a semiconductor storage device to store data in non-volatile memory and a method of throttling the performance of the semiconductor storage device.
2. Background of the Invention
Semiconductor storage devices, which store data using a semiconductor device, especially, a non-volatile memory device, are advantageous in that they are fast, robust to physical shock, generate a small amount of heat or noise, and can be miniaturized compared to disk storage media, i.e., hard disk drives that have been widely used as large-capacity storage devices.
Meanwhile, semiconductor storage devices may have a limited life. For instance, a NAND flash memory device is divided into blocks each of which includes a plurality of pages. When a NAND flash memory device is used, a block is erased and then the pages in the block are sequentially programmed with data. To program with new data the block in which all pages have been programmed, the block must be erased again. Such procedure is referred to as a program and erase (PE) cycle. In a NAND flash memory device, the number of PE cycles that a block can endure is limited, which is referred to as the endurance of the NAND flash memory device.
When the number of PE cycles experienced by a block exceeds an endurance limit, the block is more likely to operate in error afterwards. Besides program and erase operations, read operations and spontaneous charge loss may cause memory to operate in error. When the probability of erroneous operation increases, semiconductor storage devices should not be used any more for data integrity. Therefore, semiconductor storage devices using a NAND flash memory device have a limit to the life.
In the above example, when excessive workloads, for example, write operations, erase operations, and read operation, are put on semiconductor storage devices, the life thereof may be shortened or the expected life may not be ensured. To ensure the expected life of semiconductor storage devices, therefore, it is necessary to throttle the processing performance of semiconductor storage devices according to the intensity or amount of workloads put thereon.
For instance, recently a solid state drive (SSD) has been developed including multi-level cell (MLC) NAND flash memory for server applications. Such server-bound storage devices require high performance, i.e., high input/output (I/O) per second and have the wide fluctuation of workloads. When MLC NAND flash memory with an endurance limit is used in these applications, it is difficult to guarantee the life of an SSD.
A storage device whose life needs to be guaranteed is not restricted to a server-bound storage device. The lives of storage devices to be used in personal computers (PCs), notebook computers, mobile terminals, and so on also need to be ensured.
In addition to a NAND flash memory, phase-change random access memory (PRAM), magnetic RAM (MRAM), resistive RAM (ReRAM), and ferroelectric RAM (FeRAM) are also examples of memory with the endurance limit. NAND flash memory with the endurance limit include a NAND flash memory using a floating gate and NAND flash memory using charge trap flash (CTF).
As described above, an approach to increase the life of a semiconductor storage device using non-volatile memory with an endurance limit or ensuring the expected life thereof is desired.